MEASURING AND INTERPRETING THE CMOS IC VARIABLE INPUT IMPEDANCE VERSUS ESD STRESS |
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| Alexandru Salceanu, Valeriu David, Mihai Cretu |
- Abstract:
- The paper presents a comparative method (and the related results) for measuring the various impedances of a Si-gate CMOS digital circuit, very useful for the study of the dual input protection configuration, with respect to an ESD pulse. The results of the performed measurements are interpreted according to the behaviour of the two main protective circuits and are useful to verify the waveform at the output of a self-manufactured ESD tester, the load values being essential.
- Download:
- IMEKO-TC4-2004-092.pdf
- DOI:
- -
- Event details
- IMEKO TC:
- TC4
- Event name:
- TC4 Symposium 2004
- Title:
- XIII IMEKO TC4 International Symposium on Measurements for Research and Industrial Applications (together with IXth International Workshop on ADC Modeling and Testing, IWADC)
- Place:
- Athens, GREECE
- Time:
- 29 September 2004 - 01 October 2004